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ISL28270, ISL28273, ISL28470
Data Sheet August 3, 2007 FN6260.4
Dual and Quad Channel Micropower, Single Supply, Rail-to-Rail Input and Output (RRIO) Instrumentation Amplifiers
The ISL28270 and ISL28273 are dual channel micropower instrumentation amplifiers (in-amps) and the ISL28470 is a quad channel in-amp optimized for single supply operation over the +2.4V to +5.5V range. All three devices feature an Input Range Enhancement Circuit (IREC) which maintains CMRR performance for input voltages equal to the positive supply and down to 50mV above the negative supply rail. The input signal is capable of swinging above the positive supply rail and to 10mV above the negative supply with only a slight degradation of the CMRR performance. The output operation is rail-to-rail. The ISL28273 is compensated for a minimum gain of 10 or more. For higher gain applications, the ISL28270 and ISL28470 are compensated for a minimum gain of 100. The in-amps have bipolar input devices for best offset and excellent 1/f noise performance. The amplifiers can be operated from one lithium cell or two Ni-Cd batteries.
Features
* 150V max offset voltage (ISL28270, ISL28470) * 600V max offset voltage (ISL28273) * 2.5nA max input bias current (ISL28270, ISL28470) * 110dB CMRR * 0.7V/C offset voltage temperature coefficient * 240kHz -3dB bandwidth (G = 100) ISL28270, ISL28470 * 230kHz -3dB bandwidth (G = 10) ISL28273 * Single supply operation * Rail-to-rail input and output (RRIO) * Pb-free plus anneal available (RoHS compliant)
Applications
* Battery or solar-powered systems * Strain gauge * Sensor signal conditioning * Medical devices * Industrial instrumentations
Ordering Information
PART NUMBER (Note) ISL28270IAZ ISL28270IAZ-T13* ISL28273FAZ ISL28273FAZ-T7* ISL28470FAZ ISL28470FAZ-T7 * PART MARKING 28270 IAZ 28270 IAZ 28273 FAZ 28273 FAZ PACKAGE (Pb-Free) 16 Ld QSOP 16 Ld QSOP 16 Ld QSOP 16 Ld QSOP PKG. DWG. # MDP0040 MDP0040 MDP0040 MDP0040 MDP0040 MDP0040
Related Literature
* AN1289, ISL28470EVAL1Z Evaluation Board User's Guide * AN1290, ISL2827xINEVAL1Z Evaluation Board User's Guide * AN1298, Instrumentation Amplifier Application Note
ISL28470 FAZ 28 Ld QSOP ISL28470 FAZ 28 Ld QSOP
ISL28270INEVAL1Z Evaluation Platform ISL28273INEVAL1Z Evaluation Platform ISL28470EVAL1Z Evaluation Platform
*Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2006, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL28270, ISL28273, ISL28470 Pinouts
ISL28270, ISL28273 (16 LD QSOP) TOP VIEW
NC 1 OUT_A 2 FB+_A 3 FB-_A 4 IN-_A 5 IN+_A 6 EN_A 7 V- 8 +-+ 16 V+ 15 OUT_B 14 FB+_B 13 FB-_B 12 IN-_B 11 IN+_B 10 EN_B 9 NC OUT_A 1 FB+_A 2 FB-_A 3 IN-_A 4 IN+_A 5 EN_A 6 V+ 7 EN_B 8 IN+_B 9 IN-_B 10 FB-_B 11 FB+_B 12 OUT_B 13 NC 14 +-+ +-+
ISL28470 (28 LD QSOP) TOP VIEW
28 OUT_D 27 FB+_D 26 FB-_D 25 IN-_D 24 IN+_D 23 EN_D 22 V21 EN_C 20 IN+_C 19 IN-_C 18 FB-_C 17 FB+_C 16 OUT_C 15 NC
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470
Absolute Maximum Ratings (TA = +25C)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/s Input Current (IN, FB) ISL28270, ISL28470 . . . . . . . . . . . . . . . 5mA Differential Input Voltage (IN, FB) ISL28270, ISL28470 . . . . . . 0.5V Input Current (IN, FB) ISL28273 . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input (IN, FB) Voltage ISL28273 . . . . . . . . . . . . . . . 1.0V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Information
Thermal Resistance JA (C/W) 16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . 112 28 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . 79 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40C to +125C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. CONDITIONS MIN (Note 1) TYP MAX (Note 1) UNIT
PARAMETER DC SPECIFICATIONS VOS
DESCRIPTION
Input Offset Voltage
ISL28270, ISL28470 ISL28273
-150 -225 -600 -1000
35
150 225 600 1000
V V V/C
12
TCVOS IOS
Input Offset Voltage Temperature Coefficient Input Offset Current between IN+ and IN-, and between FB+ and FB-
Temperature = -40C to +125C ISL28270 ISL28470 ISL28273 -1 -1.5 -1.5 -2.0 -1 -1.5 -2.0 -2.5 -2.5 -3.0 -2.5 -3.0
0.7
0.25
1 1.5 1.5 2 1 1.5 2.0 2.5 2.5 3.0 2.5 3.0
nA nA nA nA nA nA M M
0.25
0.2
IB
Input Bias Current (IN+, IN-, FB+, and FB- terminals)
ISL28270 ISL28470 ISL28273
0.5
0.5
1
RIN
Input Resistance
ISL28270, ISL28470 ISL28273
3 15 0 5 110 110 110 110 95 110
VIN CMRR
Input Voltage Range Common Mode Rejection Ratio ISL28270 ISL28273 ISL28470 VCM = 0.05V to 5V
V dB dB dB dB dB dB
90 85 90 85
PSRR
Power Supply Rejection Ratio
ISL28270 ISL28273 ISL28470
V+ = 2.4V to 5V
90 80 75 90 65
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470
Electrical Specifications
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. (Continued) CONDITIONS ISL28270, ISL28470 ISL28273 VOUT Maximum Voltage Swing Output low, 100k to 2.5V Output low, 1k to 2.5V Output high, 100k to 2.5V Output high, 1k to GND IS,EN Supply Current, Enabled ISL28270, ISL28273 - Both A and B Channels enabled, EN = VISL28470 - A, B, C and D Channels enabled, EN = VIS,DIS Supply Current, Disabled ISL28270, ISL28273- Both A and B Channels disabled, EN = V+ ISL28470 - A, B, C and D Channels disabled, EN = V+ VENH VENL IENH IENL VSUPPLY ISC EN Pin for Shut-down EN Pin for Power-On EN Input Current High EN Input Current Low Supply Operating Range Short Circuit Output Current EN = V+ EN = VV+ to V- (Note 2) V+ = 5V, RLOAD = 10 2.4 20 18 29 0.8 26 2 0.8 1 1.3 50 100 5.5 4.990 4.75 4.70 RL = 100k to VCM MIN (Note 1) TYP +0.5 +0.12 4 130 4.996 4.88 120 260 4 10 156 195 335 7 9 12 15 10 250 300 MAX (Note 1) UNIT % % mV mV V V A A A A V V A nA V mA
PARAMETER EG Gain Error
DESCRIPTION
AC SPECIFICATIONS SR Slew Rate RL = 1k to GND, ISL28270, ISL28470 RL = 1k to GND, ISL28273 -3dB BW -3dB Bandwidth ISL28270, ISL28470 Gain = 100 Gain = 200 Gain = 500 Gain = 1000 ISL28273 Gain = 10 Gain = 20 Gain = 50 Gain = 100 eN Input Noise Voltage ISL28270, ISL28470 ISL28273 Input Noise Voltage Density ISL28270, ISL28470 ISL28273 fo = 1kHz f = 0.1Hz to 10Hz 0.3 0.25 0.35 0.3 0.5 0.6 240 84 30 13 265 100 25 13 3.5 3.5 60 210 0.7 0.75 0.75 0.8 kHz kHz kHz kHz kHz kHz kHz kHz VP-P VP-P nV/Hz nV/Hz V/s
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470
Electrical Specifications
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. (Continued) CONDITIONS ISL28270, ISL28470 ISL28273 CMRR @ 60Hz PSRR+ @ 120Hz PSRR- @ 120Hz NOTE: 1. Parts are 100% tested at +25C. Over temperature limits established by characterization and are not production tested. 2. VSUPPLY = +5.25V max when VENL = +V (device in disable state). Input Common Mode Rejection Ratio ISL28270, ISL28470 ISL28273 Power Supply Rejection Ratio (V+) ISL28270, ISL28470 ISL28273 Power Supply Rejection Ratio (V-) ISL28270, ISL28470 ISL28273 VCM = 1VP-P, RL = 10k to VCM V+, V- = 1.2V, 2.5V, VSOURCE = 1VP-P, RL = 10k to VCM V+, V- = 1.2V, 2.5V, VSOURCE = 1VP-P, RL = 10k to VCM fo = 1kHz MIN (Note 1) TYP 0.37 0.75 100 83 96 77 105 84 dB dB dB dB MAX (Note 1) UNIT pA/Hz pA/Hz dB
PARAMETER iN
DESCRIPTION Input Noise Current Density
Typical Performance Curves
90 80 70 60 50 40 30 1 10 100 1k 10k FREQUENCY (Hz) GAIN = 2,000V/V GAIN = 1,000V/V GAIN = 500V/V GAIN = 200V/V GAIN = 100V/V
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified.
COMMON-MODE INPUT = V+ GAIN = 10,000V/V GAIN = 5,000V/V
70 60 GAIN = 1000 50 GAIN (dB) 40 30 20 10 1E+00 GAIN = 500 GAIN = 200 GAIN = 100 GAIN = 50 GAIN = 20 GAIN = 10 1E+01 1E+02
COMMON-MODE INPUT = V+
GAIN (dB)
100k
1M
1E+03
1E+04
1E+05
1E+06
FREQUENCY (Hz)
FIGURE 1. ISL28270, ISL28470 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, VCM = V+ = 5V
FIGURE 2. ISL28273 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, VCM = V+ = 5V
90 80 70 GAIN (dB) 60 50 40 30 GAIN = 2,000V/V GAIN = 1,000V/V GAIN = 500V/V GAIN = 200V/V GAIN = 100V/V
COMMON-MODE INPUT = 1/2V+ GAIN = 10,000V/V GAIN = 5,000V/V
70 60 50 GAIN (dB) 40 30 20 GAIN = 1000 GAIN = 500 GAIN = 200 GAIN = 100 GAIN = 50 GAIN = 20 GAIN = 10
COMMON-MODE INPUT = 1/2V+
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
10 1E+00
1E+01
1E+02 1E+03 1E+04 FREQUENCY (Hz)
1E+05
1E+06
FIGURE 3. ISL28270, ISL28470 FREQUENCY RESPONSE vs CLOSED LOOP GAIN. V+ = 5V, VCM = 1/2V+
FIGURE 4. ISL28273 FREQUENCY RESPONSE vs CLOSED LOOP GAIN. V+ = 5V, VCM = 1/2V+
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Typical Performance Curves
90 80 70 GAIN (dB) 60 GAIN = 500V/V 50 40 30 GAIN = 200V/V GAIN = 100V/V
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. (Continued)
70
COMMON-MODE INPUT = V- + 10mV GAIN = 10,000V/V GAIN = 5,000V/V GAIN = 2,000V/V GAIN = 1,000V/V GAIN (dB) 50 40 30 20 10 1E+00 60 GAIN = 500 GAIN = 200 GAIN = 100 GAIN = 50 GAIN = 20 GAIN = 10
COMMON-MODE INPUT = V- + 10mV GAIN = 1000
1
10
100 1k 10k FREQUENCY (Hz)
100k
1M
1E+01
1E+02 1E+03 1E+04 FREQUENCY (Hz)
1E+05
1E+06
FIGURE 5. ISL28270, ISL28470 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, V+ = 5V, VCM = 10mV
FIGURE 6. ISL28273 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, V+ = 5V, VCM = 10mV
45 40 35 30 GAIN (dB) 25 20 15 10 5 AV = 100 RL = 10k CL = 10pF RF/RG = 99.02 RF = 221k RG = 2.23k 1k 10k 100k 1M FREQUENCY (Hz) V+ = 3.3V GAIN (dB) V+ = 5V
25 V+ = 5V 20 V+ = 3.3V 15 V+ = 2.4V AV = 10 R = 10k CL = 10pF RF/RG = 9.08 RF = 178k RG = 19.6k 1k 10k FREQUENCY (Hz) 100k 1M
V+ = 2.4V
10
5
0 100
0 100
FIGURE 7. ISL28270, ISL28470 FREQUENCY RESPONSE vs SUPPLY VOLTAGE
FIGURE 8. ISL28273 FREQUENCY RESPONSE vs SUPPLY VOLTAGE
50
30 25 CL = 470pF CL = 820pF GAIN (dB) CL = 47pF 20 CL = 27pF 15 CL = 2.7pF 10 5 AV = 10 V+ = 5V RL = 10k RF/RG = 9.08 RF = 178k RG = 19.6k 1k 10k FREQUENCY (Hz) 100k 1M CL = 100pF
45
GAIN (dB)
40 CL = 220pF 35 AV = 100 V+, V- = 2.5V RL = 10k RF/RG = 99.02 RF = 221k RG = 2.23k 1k 10k FREQUENCY (Hz) CL = 56pF
30
25 100
100k
1M
0 100
FIGURE 9. ISL28270, ISL28470 FREQUENCY RESPONSE vs CLOAD
FIGURE 10. ISL28273 FREQUENCY RESPONSE vs CLOAD
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Typical Performance Curves
120 100 80 60 40 20 0 10 CMRR
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. (Continued)
90 80 70 60 CMRR (dB) 50 40 30 20 10 0 CMRR
CMRR (dB)
100
1k
10k
100k
1M
-10
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. ISL28270, ISL28470 CMRR vs FREQUENCY
FIGURE 12. ISL28273 CMRR vs FREQUENCY
140 120 100 80 60 40 20 0 10 PSRRPSRR+ PSRR (dB)
90 80 PSRR+ 70 60 50 40 30 20 10 100 1k 10k FREQUENCY (Hz) 100k 1M 0 10 100 1k 10k FREQUENCY (Hz) 100k 1M PSRR-
PSRR (dB)
FIGURE 13. ISL28270, ISL28470 PSRR vs FREQUENCY
FIGURE 14. ISL28273 PSRR vs FREQUENCY
250 INPUT VOLTAGE NOISE (nV/Hz) INPUT VOLTAGE NOISE (V/Hz)
2.5 2.0 1.5 1.0 0.5 0.0
200
150
100
50
1
10
100
1k
10k
100k
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 15. ISL28270, ISL28470 INPUT VOLTAGE NOISE SPECTRAL DENSITY (GAIN = 100)
FIGURE 16. ISL28273 INPUT VOLTAGE NOISE SPECTRAL DENSITY (GAIN = 10)
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Typical Performance Curves
1.0 CURRENT NOISE (pA/Hz) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 1 10 100 1k 10k 100k CURRENT NOISE (pA/Hz)
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. (Continued)
5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1 10 100 1k 10k 100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 17. ISL28270, ISL28470 INPUT CURRENT NOISE SPECTRAL DENSITY (GAIN = 100)
FIGURE 18. ISL28273 INPUT CURRENT NOISE SPECTRAL DENSITY (GAIN = 10)
VOLTAGE NOISE (0.5V/DIV)
VOLTAGE NOISE (0.5V/DIV)
TIME (1s/DIV)
TIME (1s/DIV)
FIGURE 19. ISL28270, ISL28470 0.1Hz TO 10Hz INPUT VOLTAGE NOISE (GAIN = 100)
FIGURE 20. ISL28273 0.1Hz TO 10Hz INPUT VOLTAGE NOISE (GAIN = 10)
100 80 60 40
0.5 0.4 0.3 0.2 I-BIAS (nA) -1 0 1 2 3 VCM (V) 4 5 6 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -1 0 1 2 3 VCM (V) 4 5 6 7
VOS (V)
20 0 -20 -40 -60 -80
-100
FIGURE 21. INPUT OFFSET VOLTAGE vs COMMON MODE VOLTAGE, V+ = 5V
FIGURE 22. INPUT BIAS CURRENT vs COMMON MODE VOLTAGE, V+ = 5V
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Typical Performance Curves
170 n = 1000 SUPPLY CURRENT (A) MAX SUPPLY CURRENT (A) 160 150 140 130 120 110 100 -40 -20 0 20 40 60 80 100 120 2.7 -40 -20 0 20 40 60 80 100 120 MEDIAN MIN 4.7 MAX 4.2 MEDIAN 3.7 MIN 3.2
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. (Continued)
n = 1000
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 23. ENABLED SUPPLY CURRENT (CHANNEL A AND CHANNEL B) vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V, RL = INF
FIGURE 24. DISABLED SUPPLY CURRENT (CHANNEL A AND CHANNEL B) vs TEMPERATURE, V+, V- = 2.5V, VEN = V+, VIN = 0V, RL = INF
4 n = 1000 3 MAX IBIAS FB+ (nA) 2 IBIAS IN+ (nA) 1 0 -1
MIN
2.0 1.5 1.0 0.5
n = 1000 MAX
MEDIAN
MEDIAN 0
MIN
-0.5 -1.0
-2 -3 -40 -20 0 20 40 60 80 100 120
-1.5 -40
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 25. IBIAS IN+ vs TEMPERATURE, V+, V- = 2.5V
FIGURE 26. IBIAS FB+ vs TEMPERATURE, V+, V- = 2.5V
3 n = 1000 2 MAX 1 MEDIAN 0 -1
MIN
2.5 2.0
n = 1000 MAX
1.5 IBIAS FB - (nA) 1.0 0.5 0 -0.5
MIN
IBIAS IN- (nA)
MEDIAN
-2 -3
-1.0 -40 -20 0 20 40 60 80 100 120 -1.5 -40 -20 0 20 40 60 80 100 120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 27. IBIAS IN- vs TEMPERATURE, V+, V- = 2.5V
FIGURE 28. IBIAS FB- vs TEMPERATURE, V+, V- = 2.5V
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Typical Performance Curves
4 3 IBIAS FB+ (nA) 2 IBIAS IN+ (nA) 1 0 -1 -2 -3 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN n = 1000
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. (Continued)
3.5
MAX
3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0
n = 1000
MAX
MEDIAN
MIN -20 0 20 40 60 80 100 120
-1.5 -40
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 29. IBIAS IN+ vs TEMPERATURE, V+, V- = 1.2V
FIGURE 30. IBIAS FB+ vs TEMPERATURE, V+, V- = 1.2V
4 n = 1000 3 2 MEDIAN 1 0 -1 -2 -3 MIN IBIAS FB- (nA) IBIAS IN- (nA) MAX
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0
-40 -20 0 20 40 60 80 100 120 MIN MAX n = 1000
MEDIAN
-1.5
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 31. IBIAS IN- vs TEMPERATURE, V+, V- = 1.2V
FIGURE 32. IBIAS FB- vs TEMPERATURE, V+, V- = 1.2V
0.4 n = 1000 0.3 MAX 0.2 0.1 0.0 -0.1 MIN -0.2 -0.3 -40 MEDIAN IOS FB+ (nA) IOS IN+ (nA)
1.5 1.0 0.5
n = 1000 MAX
MEDIAN 0 -0.5 MIN -1.0 -1.5
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 33. IOS IN+ vs TEMPERATURE, V+, V- = 2.5V
FIGURE 34. IOS FB+ vs TEMPERATURE, V+, V- = 2.5V
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Typical Performance Curves
1.5 n = 1000 1.0 MAX IOS FB + (nA) IOS IN + (nA) 0.5 0.0 -0.5 -1.0 -1.5 -40
MIN
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. (Continued)
1.5 1.0 MAX 0.5 0.0 -0.5 -1.0 -1.5 -40 MEDIAN n = 1000
MEDIAN
MIN
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 35. IOS IN+ vs TEMPERATURE, V+, V- = 1.2V
FIGURE 36. IOS FB+ vs TEMPERATURE, V+, V- = 1.2V
250 200
n = 1000 MAX
700 n = 1000 500 300
150 100
VOS (V)
VOS (V)
50 0 -50 -100
MEDIAN
MAX 100 -100 MIN MEDIAN
MIN -150 -200 -40 -20 0 20 40 60 80 100 120
-300 -500 -40
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 37. ISL28270, ISL28470 VOS vs TEMPERATURE, V+, V- = 2.5V
FIGURE 38. ISL28270, ISL28470 VOS vs TEMPERATURE, V+, V- = 1.2V
1000 800 600 400
n = 1000 MAX
1.5 1.0 0.5
n = 1000 MAX
VOS (V)
200 0 -200 -400 -600 -800 -1000 -40 -20 0 20 40 60 80 100 120 MIN MEDIAN
VOS (V)
0
MEDIAN
-0.5 -1.0 MIN -1.5 -40 -20 0 20 40 60 80 100 120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 39. ISL28273 VOS vs TEMPERATURE, V+, V- = 2.5V
FIGURE 40. ISL28273 VOS vs TEMPERATURE, V+, V- = 1.2V
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Typical Performance Curves
140 n = 1000 MAX 130 120 MEDIAN 110 100 MIN 90 80 -40 85 MIN -20 0 20 40 60 80 100 120 75 -40 -20 0 20 40 60 80 100 120 125 115 105 95 MEDIAN
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. (Continued)
135 n = 1000 MAX
CMRR (dB)
TEMPERATURE (C)
PSRR (dB)
TEMPERATURE (C)
FIGURE 41. CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V, V+, V- = 2.5V
FIGURE 42. PSRR vs TEMPERATURE, V+, V- = 1.2V TO 2.5V
1.0 n = 1000 MAX 0.5 GAIN ERROR (%) 0 MEDIAN -0.5 -1.0 -1.5 -2.0 -40 GAIN ERROR (%)
0.6 n = 1000 0.5 MAX 0.4 0.3 0.2 0.1 0.0 -40 MEDIAN MIN -20 0 20 40 60 80 100 120
MIN
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
TEMPERATURE (C)
FIGURE 43. ISL28270, ISL28470 % GAIN ERROR vs TEMPERATURE, RL = 100k
FIGURE 44. ISL28273 % GAIN ERROR vs TEMPERATURE, RL = 100k
4.91 4.90
n = 1000 MAX
170 n = 1000 160 150 VOUT (mV) MEDIAN 140 130 MAX 120 110 MEDIAN 100 -40
4.89 VOUT (V) 4.88 4.87 4.86 4.85 4.84 -40 MIN
MIN
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 45. VOUT HIGH vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
FIGURE 46. VOUT LOW vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Typical Performance Curves
0.75 n = 1000 0.70 + SLEW RATE (V/s) 0.65 0.60 0.55 0.50 0.45 0.40 0.35 -40 MIN -20 0 20 40 60 80 100 120 MEDIAN MAX - SLEW RATE (V/s)
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. (Continued)
0.80 0.75 0.70 0.65 0.60 0.55 0.50 MIN 0.45 0.40 -40 -20 0 20 40 60 80 100 120 MEDIAN n = 1000
MAX
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 47. + SLEW RATE vs TEMPERATURE, INPUT = 0.015V AT GAIN = +10
FIGURE 48. - SLEW RATE vs TEMPERATURE, INPUT = 0.15V AT GAIN = +10
Pin Descriptions
ISL28270 ISL28273 ISL28470 16 Ld QSOP 16 Ld QSOP 28 Ld QSOP 2, 15 2, 15 1, 13 16, 28 2, 12 17, 27 PIN NAMES OUT_A, OUT_B, OUT_C, OUT_D FB+_A, FB+_B, FB+_C, FB+_D EQUIVALENT CIRCUIT Circuit 3 PIN FUNCTION Output Voltage. A complementary Class AB common-source output stage drives the output of each channel. When disabled, the outputs are in a high impedance state Positive Feedback high impedance terminals. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B. It can be used as a REF terminal to adjust or level shift the output. ISL28273: to avoid offset drift, it is recommended that the terminals of the ISL28273 are not overdriven beyond 1V and the input current must never exceed 5mA. 4, 13 4, 13 3, 11 18, 26 FB-_A, FB-_B, FB-_C, FB-_D Circuit 1A, Circuit 1B Negative Feedback high impedance terminals. The FB- pins connect to an external resistor divider to individually set the desired gain of the inamp. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B. ISL28273: to avoid offset drift, it is recommended that the terminals of the ISL28273 are not overdriven beyond 1V and the input current must never exceed 5mA. 5, 12 5, 12 4, 10 19, 25 IN-_A, IN-_B, IN-_C, IN-_D Circuit 1A, Circuit 1B High impedance Inverting input terminals. Connect to the low side of the input source signal. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B. ISL28273: to avoid offset drift, it is recommended that the terminals of the ISL28273 are not overdriven beyond 1V and the input current must never exceed 5mA. 6, 11 6, 11 5, 9 20, 24 IN+_A, IN+_B, IN+_C, IN+_D Circuit 1A, Circuit 1B High impedance Non-inverting input terminals. Connect to the high side of the input source signal. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B. ISL28273: to avoid offset drift, it is recommended that the terminals of the ISL28273 are not overdriven beyond 1V and the input current must never exceed 5mA. 7, 10 7, 10 6, 8 21, 23 EN_A, EN_B, EN_C, EN_D Circuit 2 Active LOW logic pins. When pulled above 2V, the corresponding channel turns off and OUT is high impedance. A channel is enabled when pulled below 0.8V. Built-in pull-downs define each EN pin LOW when left floating. Positive Supply terminal shared by all channels.
3, 14
3, 14
Circuit 1A, Circuit 1B
16
16
7
V+
Circuit 4
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Pin Descriptions (Continued)
ISL28270 ISL28273 ISL28470 16 Ld QSOP 16 Ld QSOP 28 Ld QSOP 8 1, 9 8 1, 9 22 14,15 PIN NAMES VNC
V+ LOGIC PIN VCIRCUIT 2 V+ INFBIN+ FB+ VCIRCUIT 3
EQUIVALENT CIRCUIT Circuit 4
PIN FUNCTION Negative Supply terminal shared by all channels. Grounded for single supply operation. No Connect, pins can be left floating or grounded
V+ INFBIN+ FB+ V-
V+ OUT V-
V+
CAPACITIVELY COUPLED ESD CLAMP
VCIRCUIT 4
CIRCUIT 1A
CIRCUIT 1B
Application Information
Product Description
The ISL28270 and ISL28273 are dual channel micro-power instrumentation amplifiers (in-amps) and the ISL28470 is a quad channel which deliver rail-to-rail input amplification and rail-to-rail output swing. The in-amps also deliver excellent DC and AC specifications while consuming only about 60A per channel. Because the independent pair of feedback terminals set the gain and adjust the output zero level, the ISL28270, ISL28273 and ISL28470 achieve high CMRR regardless of the tolerance of the gain setting resistors. The ISL28270 and ISL28470 are internally compensated for a minimum gain of 100. The ISL28273 is internally compensated for a minimum gain of 10. EN pins are available to independently enable or disable a channel. When all channels are off, current consumption is down to typically 4A on the duals (ISL28270 and ISL28273), and 10A on the quad (ISL28470).
series resistors may be used as an external protection to limit excessive external voltage and current from damaging the inputs. On the other hand, the ISL28273 has no clamps to limit the differential voltage on the input terminals allowing higher differential input voltages at lower gain applications. It is recommended, however, that the terminals of the ISL28273 are not overdriven beyond 1V to avoid offset drift.
Input Stage and Input Voltage Range
The input terminals (IN+ and IN-) of the in-amps are a single differential pair of bipolar PNP devices aided by an Input Range Enhancement Circuit, IREC, to increase the headroom of operation of the common-mode input voltage. The feedback terminals (FB+ and FB-) also have a similar topology. As a result, the input common-mode voltage range is rail-to-rail regardless of the feedback terminal settings and regardless of the gain settings. They are able to handle input voltages that are at or slightly beyond the supply and close to ground making these in-amps well suited for single 5V down to 2.4V supply systems. There is no need to bias the common-mode input to achieve symmetrical input voltage. It is recommended however that the common-mode input be biased at least 10mV above the negative supply rail to achieve top performance. See "Input Bias Cancellation/Compensation" on page 15. The IREC enables rail-to-rail input amplification without the problems usually associated with the dual differential stage topology. The IREC ensures that there are no drastic changes in offset voltage over the entire range of the input. See Input Offset Voltage vs Common-Mode Input Voltage on page 8. IREC also cures the abrupt change and even reverse polarity of the input bias current over the whole
Input Protection
All input terminals and feedback terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. Input signals originating from low impedance sources should have current limiting resistors in series with the IN+ and IN- pins to prevent damaging currents during power supply sequencing and other transient conditions. The ISL28270 and ISL28470 have additional back-to-back diodes across the input terminals and also across the feedback terminals. If overdriving the inputs is necessary, the external input current must never exceed 5mA. External
14
FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470
range of input. See Input Bias Current vs Common-Mode Input Voltage on page 8.
2.4V TO 5.5V EN
Input Bias Cancellation/Compensation
All three parts have an Input Bias Cancellation/Compensation Circuit for both the input and feedback terminals (IN+, IN-, FB+ and FB-), achieving a low input bias current throughout the input common-mode range and the operating temperature range. While the PNP bipolar input stages are biased with an adequate amount of biasing current for speed and increased noise performance, the Input Bias Cancellation/Compensation Circuit sinks most of the base current of the input transistors leaving a small portion as input bias current, typically 500pA. In addition, the Input Bias Cancellation/Compensation Circuit maintains a smooth and flat behavior of input bias current over the common mode range and over the operating temperature range. The Input Bias Cancellation/Compensation Circuit operates from input voltages of 10mV above the negative supply to input voltages slightly above the positive supply. See Input Bias Current vs Common-Mode Input Voltage in the "Typical Performance Curves" on page 8.
IN+
IN+ IN-
V+ + ISL28270 + V-
EN
IN-
FB+ FB-
VOUT
VCM
RG
RF
FIGURE 49. GAIN IS SET BY TWO EXTERNAL RESISTORS, RF AND RG
Reference Connection
Unlike a three op amp in-amp realization, a finite series resistance seen at the REF terminal does not degrade the high CMRR performance, eliminating the need for an additional external buffer amplifier. Figure 50 uses the FB+ pin to provide a high impedance REF terminal.
2.4V TO 5.5V EN
Output Stage and Output Voltage Range
A Class AB common-source output stage drives the output. The pair of complementary MOSFET devices drive the output VOUT to within a few millivolts of the supply rails. At a 100k load, the PMOS sources current and pulls the output up to 4mV below the positive supply. The NMOS sinks current and pulls the output down to 4mV above the negative supply, or ground in the case of a single supply operation. The current sinking and sourcing capability are internally limited to 29mA. When disabled, the outputs are in a high impedance state.
IN+ IN+ ININ2.9V to 5.5V VCM R1 REF R2 RG FB+ FB+ -
V+
EN
ISL28270 + V-
VOUT
Gain Setting
VIN, the potential difference across IN+ and IN-, is replicated (less the input offset voltage) across FB+ and FB-. The function of the in-amp is to maintain the differential voltage across FB- and FB+ equal to IN+ and IN-; (FB- - FB+) = (IN+ - IN-). Consequently, the transfer function can be derived. The in-amp gain is set by two external resistors, the feedback resistor RF, and the gain resistor RG.
VIN = IN+ - INRF VOUT = 1 + ------- VIN R G (EQ. 1)
RF
FIGURE 50. GAIN SETTING AND REFERENCE CONNECTION
.
VIN = IN+ - INRF RF VOUT = 1 + ------- ( VIN ) + 1 + ------- ( VREF ) R G R G (EQ. 2)
In Figure 49, the FB+ pin and one end of resistor RG are connected to GND. With this configuration, Equation 1 is only true for a positive swing in VIN; negative input swings will be ignored because the output will be at ground.
The FB+ pin is used as a REF terminal to center or to adjust the output. Because the FB+ pin is a high impedance input, an economical resistor divider can be used to set the voltage at the REF terminal without degrading or affecting the CMRR performance. Any voltage applied to the REF terminal will shift VOUT by VREF times the closed loop gain, which is set by resistors RF and RG. Note that any noise or unwanted signals on the reference supply will be amplified at the output according to Equation 2. See Figure 50. The FB+ pin can also be connected to the other end of resistor, RG. See Figure 51. Keeping the basic concept that
15
FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470
the in-amp maintains constant differential voltage across the input terminals and feedback terminals (FB- - FB+) = (IN+ - IN-), the transfer function of Figure 51 can be derived from Equation 3. Note that the VREF gain term is eliminated, and susceptibility to external noise is reduced.
2.4V TO 5.5V EN
Where:
ERG = Tolerance of RG ERF = Tolerance of RF EG = Gain Error of the ISL28270
IN+
IN+ IN-
V+ + ISL28270 + V-
EN
The term [1 - (ERG +ERF +EG)] is the deviation from the theoretical gain. Thus, (ERG +ERF +EG) is the total gain error. For example, if 1% resistors are used, the total gain error would be:
TotalGainError = ( E RG + E RF + E G ( typical ) ) TotalGainError = ( 0.01 + 0.01 + 0.005 ) = 2.5% (EQ. 6)
IN-
FB+ FB-
VOUT
VCM
Disable/Power-Down
The ISL28270, ISL28273 and ISL28470 have an enable/disable pin for each channel. They can be powered down to reduce the supply current to typically 4A when all channels are off. When disabled, the corresponding output is in a high impedance state. The active low EN pin has an internal pull-down and hence can be left floating and the in-amp enabled by default. When the EN is connected to an external logic, the in-amp will shutdown when the EN pin is pulled above 2V, and will power up when EN is pulled below 0.8V.
RS VREF RG RF
FIGURE 51. REFERENCE CONNECTION WITH AN AVAILABLE VREF VIN = IN+ - INRS + RF VOUT = 1 + --------------------- + VREF RG RF VOUT = 1 + ------- ( VIN ) + ( VREF ) R G
(EQ. 3)
Unused Channels
(EQ. 4)
A finite resistance RS in series with the VREF source, adds an output offset of VIN*(RS/RG). As the series resistance RS approaches zero, Equation 3 is simplified to Equation 4 for Figure 51. VOUT is simply shifted by an amount VREF.
External Resistor Mismatches
Because of the independent pair of feedback terminals provided by the in-amps, the CMRR is not degraded by any resistor mismatches. Hence, unlike a three op amp and especially a two op amp in-amp realization, the ISL28270, ISL28273 and ISL28470 reduce the cost of external components by allowing the use of 1% or more tolerance resistors without sacrificing CMRR performance. The CMRR will be typically 110dB regardless of the tolerance of the resistors used. Instead, a resistor mismatch results in a higher deviation from the theoretical gain - gain error.
The ISL28270, ISL28273 and ISL28470 are dual and quad channel op amps. If the application only requires one channel when using the ISL28270, ISL28273 or less than 4 channels when using the ISL28470, the user must configure the unused channel(s) to prevent them from oscillating. The unused channel(s) will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the IN+ and IN- terminals to ground and short the FB+, FBand the output terminals to ground as shown in Figure 52.
1/2 ISL28270, ISL28273 1/4 ISL28470
IN+ IN-
+ -
FB+ FB-
+ -
Gain Error and Accuracy
The gain error indicated in the "Electrical Specifications" table on page 4 is the inherent gain error alone. The gain error specification listed does not include the gain error contributed by the resistors. There is an additional gain error due to the tolerance of the resistors used. The resulting non-ideal transfer function effectively becomes:
RF VOUT = 1 + ------- x [ 1 ( E RG + E RF + E G ) ] x VIN R G (EQ. 5)
FIGURE 52. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
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FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470
Power Dissipation
It is possible to exceed the +150C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 7:
T JMAX = T MAX + ( JA xPD MAXTOTAL ) (EQ. 7)
where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated as shown in Equation 8:
V OUTMAX PD MAX = 2*V S x I SMAX + ( V S - V OUTMAX ) x --------------------------RL (EQ. 8)
where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Supply voltage (Magnitude of V+ and V-) * IMAX = Maximum supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance
17
FN6260.4 August 3, 2007
ISL28270, ISL28273, ISL28470 Quarter Size Outline Plastic Packages Family (QSOP)
A D N (N/2)+1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
PIN #1 I.D. MARK
A A1 A2 b
0.068 0.006 0.056 0.010 0.008 0.193 0.236 0.154 0.025 0.025 0.041 16
0.068 0.006 0.056 0.010 0.008 0.341 0.236 0.154 0.025 0.025 0.041 24
0.068 0.006 0.056 0.010 0.008 0.390 0.236 0.154 0.025 0.025 0.041 28
Max. 0.002 0.004 0.002 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference
1, 3 2, 3 Rev. F 2/07
E
E1
1 B 0.010 CAB
(N/2)
c D E
e C SEATING PLANE 0.004 C 0.007 CAB b
H
E1 e L L1 N
L1 A c SEE DETAIL "X"
NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010 A2 GAUGE PLANE L 44 DETAIL X
A1
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 18
FN6260.4 August 3, 2007

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